Archive

Matthieu ARZEL

Poste

Enseignant-chercheur

Localisation

Brest

Contact information:

Tél.

+33 2 29 00 13 11
    Biographie

    (full CV in pdf format)

     

    Education

    • HDR ("Habilitation à diriger des recherches"), highest academic degree in France, required to hold full professor positions in French universities, Université de Bretagne Sud, 2021

    • PhD in Electronics, Ecole Nationale Supérieure des Télécommunications (ENST) de Bretagne (France), 2006

    • DEA (MSc) in Electronics from Université de Bretagne Sud, 2002

    • Engineering degree from Ecole Nationale Supérieure des Télécommunications (ENST) de Bretagne (France), 2002

    Fields of expertise

    • Iterative processing techniques for digital communications

    • Analogue/mixed integrated circuit architectures and low-power flexible Systems on Chip in the fields of

      • digital communications

      • medical engineering

      • neural networks

    • High-speed digital circuits for digital communications and network security

    • FPGA implementation

    Professional experience/projects

    • 2006-2021: Associate professor at Telecom Bretagne, and then IMT Atlantique, Department of Electronics Engineering
      2021-today: Full professor at IMT Atlantique, Department of Mathematical and Electrical Engineering

      • Supervisor of 18 PhD candidates

      • Deputy head in charge of teaching activities in the Department of Mathematical and Electrical Engineering

      • Member of the Teaching Steering Committee of IMT Atlantique

    • 2005-2006: Research Engineer at TurboConcept (France)

      • Designer of IP modules for synchronization and error correction in digital receivers.

    • Deputy head of the Departments Electronics (2018-20) and MEE (2021-) in charge of courses
    • Member of the Teaching Steering Committee (since 2018)
    • Member of the Competences Assessment Workgroup (since 2013)
    • Responsible of courses in Electronics
      • 300 hours from Fundamentals in Digital Electronics and VHDL language to High-Level Synthesis and Parallel architectures and programming
    • Supervisor of projects over the 3 years of the engineer curriculum
      • From first-year projects to discover team-work and engineering to research projects in circuit design.
    • Supervisor of 40 student internships either in final-year or engineer apprenticeship

    Principal investigator and manager of 18 research projects for the different instutions and companies.

    High-throughput architectures for digital communications

    • Analog processing of digital information
      • 1 PhD (Daniel GOMEZ TORO, 2011-14).
      • Design of two 0.25?m BiCMOS ASICs.
      • Research projects for ESA (2013) and for Orange Labs (2007-10)
      • 2 patents.
    • Stochastic decoding of convolutional/turbo-/Cortex/Reed-Solomon codes
      • 1 PhD (Quang Trung DONG, 2008-11) and 3 Master theses.
      • Collaboration with J.C. Carlach, Orange Labs.
      • Collaboration with Warren Gross, McGill University, Canada.
    • Digital processing for mobile, satellite and optical communications
      • 2 PhDs with Orange Labs (Jean DION, 2010-13 and Tuan Anh TRUONG, 2011-14).
      • 1 PhD (Ali HAROUN, 2010-14) with Christophe Jégo, IMS, Bordeaux.
      • 2 PhDs with SAFRAN (Aomar BOURENANE, 2019-2022 and Thibault PIANA, 2021-24).
      • 1 PhD with B-COM (Abdul REHMAN, 2021-24).
      • Projects for the French Research Agency : AFANA (2007-10), ANR UDEC (2008-11) and FUI 100GFlex (2010-13).
      • Research projects for STM Norway and Widenorth (Norway, 2008-09 and 2014-15).
      • Research project ESA ARTES Advanced Technnology “Advanced Modem Prototype for Interactive Satellite Terminals”, with STM Norway, Alcatel Alenia Space España, DLR, TurboConcept, VeriSat (2007-10).
      • Research project ESA ARTES Advanced Technnology “User Terminal Wideband Modem for Very High Throughput Satellites”, with WideNorth, University of Luxembourg, NTNU et Space Norway (2018-21), https://artes.esa.int/projects/utwm.
      • Research project for Huawei Paris Research Center on the FPGA implementation of a reconfigurable decoder for quasi-cyclic convolutive LDPC codes in optical communications beyond 100Gbit/s (2018-19).
      • Research project ESA ARTES Advanced Technnology “Wideband RF over IP demonstrator” with WideNorth and Simula UiB (Norway, 2020-22), https://artes.esa.int/projects/wideband-rf-over-ip-demonstrator-wroi.
      • 1 patent.

    Flexible and high-throughput architectures for network monitoring

    • Traffic monitoring and classification on FPGA
      • 1 PhD (Tristan GROLÉAT, 2011-14)
    • Hybrid HW/SW architectures for network monitoring
      • 2 PhDs (André LALEVÉE, 2014-17 and Franck CORNEVAUX-JUIGNET, 2014-18).
      • Research project with OVH (2017-18).
      • CyberTHD demonstration platform funded by Brest Métropole and Conseil général du Finistère.

    Low-energy high-throughput architectures for autonomous intelligent systems

    • Deeply-buried biomedical circuits
      • Research project with LATIM, INSERM UMR 1101
      • Research within an inter-disciplinary workgroup on embebded systems for health (FibroSES).
    • Hardware accelerators for Brain-Computer Interfaces
      • 1 PhD (Erwan LIBESSART, 2015-18), 1 post-doc (Fabio TONI BRAZ, 2015-16).
      • Design of a 65nm CMOS ASIC and of an FPGA demonstrator.
      • Research project SABRE funded by LABEX Cominlabs with Francesco ANDRIULLI (Politecnico di Torino) and Anatole LÉCUYER (INRIA Rennes).
    • Sparse neural networks for low-cost hardware implementation
      • 2 PhDs (Benoît LARRAS, 2012-15 and Paul CHOLLET, 2014-17).
      • 2 mixed-signal 65nm CMOS ASICs.
    • Low-cost and low-energy deep learning for a widely-affordable Artificial Intelligence
      • 4 PhDs
        • Ghouthi BOUKLI HACENE (2016-19), then post-doc (2019-21), award of the best 2020 PhD thesis of the Futur & Ruptures (future and disruptive innovation) program of the Mines-Telecom Institute and award of the best 2020 PhD thesis of the Agence Francaise pour l’Intelligence Artificielle (French Agency for Artificial Intelligence);
        • Hugo TESSIER (with Stellantis 2019-2022)
        • Hugo LE BLEVEC (2021-2024)
        • Lucas GRATIVOL RIBEIRO (2021-2024), funded by the 2021 Excellence Futur & Ruptures Program with Télécom St Étienne
      • Collaboration with Yoshua BENGIO, MILA (Montréal, Canada).
      • Collaboration with Interface Concept (Quimper, France).

    PhD students:

    1. Quang Trung DONG
    Title : Stochastic decoding of turbocodes : design, implementation and prototyping on FPGA.
    Period : 01/10/2008-20/12/2011
    Supervision with Christophe Jégo
    Current position : R&D Manager, VHT, Vietnam


    2. Jean DION
    Title : Study and implementation of a generic and flexible decoder architecture for LDPC and Turbocodes.
    Period : 04/10/2010-05/11/2013
    Supervision : with Michel Jézéquel
    Current position : R&D Engineer, B-COM, France


    3. Ali HAROUN
    Title : MIMO iterative receiver based on the Belief-Propagation Algorithm
    Period : 04/10/2010-21/11/2014
    Supervision : with Charbel ABDEL-NOUR and Christophe Jégo
    Current position : Associate Professor, Libanese International University, Lebanon


    4. Tuan Anh TRUONG
    Title : Digital signal processing for next-generation passive optical networks
    Period : 03/10/2011-28/11/2014
    Supervision : with Michel Jézéquel
    Current position : FPGA & RF Signal Processing Engineer and Owner at IPCTEK


    5. Tristan GROLEAT
    Title : High performance traffic monitoring for network security and management
    Period : 03/01/2011-18/03/2014
    Supervision : with Sandrine Vaton
    Current position : Network Services Lead, OVHcloud, France


    6. Daniel GOMEZ TORO
    Title : Temporal Filtering with Soft Error Detection and Correction Technique for Radiation Hardening Based on a C-element and BICS
    Period : 03/10/2011-12/12/2014
    Supervision : with Fabrice Seguin and Michel Jézéquel
    Current position : Senior Hardware Engineer, Plexus, Germany


    7. Benoît LARRAS
    Title : Analog CMOS design and implementation of clique-based neural networks
    Period : 01/10/2012-03/12/2015
    Supervision : with Fabrice Seguin and Cyril Lahuec
    Current position : Associate Professor, JUNIA Lille, France


    8. Paul CHOLLET
    Title : Sparse processing of biological signals
    Period : 01/10/2014-24/11/2017
    Supervision : with Fabrice Seguin and Cyril Lahuec
    Current position : Associate Professor, Telecom ParisTech, France


    9. André LALEVÉE
    Title : Towards highly flexible hardware architectures for high-speed data processing : a 100 Gbps network case study
    Period : 01/10/2014-28/11/2017
    Supervision : with Pierre-Henri Horrein and Michel Jézéquel
    Current position : Associate Professor, ISEN Brest, France


    10. Franck CORNEVAUX-JUIGNET
    Title : Hardware and software co-design toward flexible terabits per second traffic processing
    Period : 01/10/2014-04/07/2018
    Supervision : with Pierre-Henri Horrein and Christian Person
    Current position : R&D Engineer, Widenorth, Norway


    11. Erwan LIBESSART
    Title : Brain-Computer Interface : new perspectives thanks to hardware accelerators
    Period : 05/10/2015-30/10/2018
    Supervision : with Cyril Lahuec and Francesco Andriulli (Politecnico di Torino)
    Current position : Associate Professor, CentraleSupélec, France


    12. Ghouthi BOUKLI HACENE
    Title : Processing and learning deep neural networks on chip
    Period : 03/10/2016-03/10/2019
    Supervision : with Nicolas Farrugia, Vincent Gripon and Michel Jézéquel
    Current position : Research scientist, Sony, Germany


    13. Aomar BOURENANE
    Title : High-throughput energy-efficient architectures of decoders for satellite downlink
    Period : 01/02/2019-
    Supervision : with Frédéric Guilloud
    Current position : ongoing PhD with SAFRAN


    14. Hugo TESSIER
    Title : Embedded implementation of deep neural networks for autonomous vehicles
    Period : 06/01/2020-
    Supervision : with Mathieu Léonardon and Vincent Gripon
    Current position : ongoing PhD with STELLANTIS


    15. Thibault PIANA
    Title : Satellite signal compression for cloud-RAN
    Period : 01/03/2021-
    Supervision : with Abdeldjalil Aïssa El Bey
    Current position : ongoing PhD with SAFRAN


    16. Hugo LE BLEVEC
    Title : Joint design of deep neural networks and hardware architectures
    Period : 01/05/2021-
    Supervision : with Mathieu Léonardon
    Current position : ongoing PhD


    17. Lucas GRATIVOL RIBEIRO
    Title : Towards an energy-efficient and privacy-protective IoT thanks to the association of Federated learning and FPGA processing
    Period : 01/09/2021-
    Supervision : with Virginie Fresse (Télécom St Étienne), Mathieu Léonardon and Guillaume Muller (Télécom St Étienne)
    Current position : ongoing PhD


    18. Abdul REHMAN
    Title : Multi-user access techniques for fast and robust tracking of multimedia content
    Period : 01/10/2021-
    Supervision : with Frédéric Guilloud, Gaëtan Le Guelvouit (B-COM) and Jean Dion (B-COM)
    Current position : ongoing PhD

     

    Post-docs and research engineers:

    1. Arun KUMAR
    Title : Implementation and prototyping of an OFDM receiver for optical communications
    Period : 01/09/2010-31/10/2011
    Funding : FUI 100GFLEX


    2. Fabio TONI BRAZ
    Title : ASIC implementation of accelerators for an EEG-based Brain-Computer Interface
    Period : 23/10/2014-30/10/2015
    Funding : Cominlabs SABRE


    3. Benoît PORTEBŒUF
    Title : FPGA implementation of a reconfigurable decoder for quasi-cyclic convolutive LDPC codes in optical communications beyond
    100Gbit/s
    Period : 01/10/2018-27/09/2019
    Funding : Research project with Huawei


    4. André LALEVÉE
    Title : Automated design flow for multi-FPGA implementation of FEC decoders
    Period : 01/10/2018-31/08/2019
    Funding : IMT Atlantique


    5. Ali MOHYDEEN
    Title : Study and design of compression techniques for wide-band RF signals on a satellite cloud-RAN system
    Period : 01/05/2020-31/12/2021
    Funding : Carnot TSN and Widenorth

    • Elected member of the Steering Committee (Conseil d’École) of Telecom Bretagne (2012-2017)
    • Elected member of the Teaching Committee (Comité de l’Enseignement) of Telecom Bretagne (2013-2017)
    • Elected member of the Rank Assessment Committee (Comité d’Évaluation des Appellations) of Telecom Bretagne (2012-2015)
    • Member of CNRS Research workgroups SOC2 and ISIS
    • Member of the technical programm committee of the International Symposium on Topics in Coding ’10, ’16, ’18 et ’23
    • Reviewer for IEEE Transactions on Signal Processing, EURASIP Journal on Advances in Signal Processing,IEEE Transactions on Circuits and Systems, IEEE Transactions on VLSI Systems, IET Electronics Letters, IEEE Transactions on Communications, IEEE Communications Letters, IEEE ISCAS, IEEE NEWCAS, IEEE ICECS
    • Award of the best poster at IEEE CNS 2017
    • Award of the best paper at IEEE NEWCAS 2020
    • PhD thesis of Ghouthi Boukli Hacene awarded as best 2020 PhD thesis of the Futur & Ruptures (future and disruptive innovation) program of the Mines-Telecom Institute and as best 2020 PhD thesis of the Agence Francaise pour l’Intelligence Artificielle (French Agency for Artificial Intelligence)
    Publications HAL